搜索资源列表
Flash_Ctrl
- 串行flash的写及擦除操作，串行flash，spi接口，支持并口输出-Serial flash write and erase operations, serial flash, spi interface, support for parallel port output
VHDL-based-design-of-SPI
- 基于VHDL的串行同步通信SPI设计 本设计是用Quartus作为开发环境，以DE2板为硬件平台实现的SPI同步串行通讯。设计过程方便。根据接收和发送两个主要部分实现了SPI的基本功能。此外，该设计还实现了波特率发生器，数码管显示的功能。用DE2板实现具有电路简洁，开发周期短的优点。充分利用了EDA设计的优点。开发过程用了VHDL硬件描述语言进行描述，从底层设计，分模块进行，充分提高了设计者的数字逻辑设计的概念。-VHDL-based SPI serial synchronous comm
SPI_interface(VHDL)
- SPI接口模块源代码（VHDL）语言，经过产品应用测试。-SPI interface module source code (VHDL language), after product application testing.
CoreSPI_21_eval
- SPI IP核源码，包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages Verilog and VHDL source code
spi_int
- realize spi interface vhdl code xilinx help ths help developers
spi
- 描述了总线的vhdl程序，并且有测试语句的描写 仿真之后可以实现-Describes the bus vhdl program, and a test statement, after describing the simulation can be achieved
Altera-memory
- 这个软件是altera 芯片对SPIflash的一个控制程序，里面读写测试已经通过。-spi flash code for VHDL
spi
- 一个vhdl开发的spi总线的控制程序，很有广泛性，可做参考-spi based on vhdl
FPGA_SPI_VHDL
- 串行外设接口（SPI）fpga 被动接收,在下降沿 采集数据并发送数据 1BYTE,要求mcu在末端采集数据。并在下降沿之前准备好数据。-Serial Peripheral Interface (SPI), The fpga passive receiving, at the falling edge of data collection the send data 1BYTE, mcu data collected at the end. And the data ready before t
spi
- Altera Cyclone SPI-slave vhdl module
EMP1270
- vhdl spi通讯十分好用，可以对AD7634进行spi通讯！-vhdl spi comment
AD_SPI
- This VHDL SPI Communication.-This is VHDL SPI Communication.
tCUSS_SPI-VHHh
- 此为VHDL的SPI通信代码，全部部在一个压缩包中，请仔细阅读后再使用． -This is the VHDL SPI communication code, all the Ministry in a compressed package, please read carefully before use.
spi
- spi总线结构设计和实现用vhdl汇编语言编写的 -spi for verilog hardware descr iption language
SPI-Master-Core-DAC-ADC-spartan
- SPI Master Core for spartan (ADC, DAC) vhdl code
SPI-Core_nguyen
- SPI Master Core HDL: VHDL 93 Compatibility: all FPGAs, CPLDs parameterization: - variable data width - Phase/polarity configurable - selectable buffer depth - serial clock devision due to system clock package usage: IEEE
spi.tar
- SPI Interface Control RTL VHDL Code
spi
- 基于system generator的SPI协议的设计，能自动转换成verilog或VHDL语言-Based on the system of the generator SPI protocol design
VHDL for SPI_AD7475
- This code is used for SPI communication between FPGA and AD7475
spi
- 用VHDL语言编的SPI接口程序-Using VHDL language is part of SPI interface program. . . . . . . . . . . . . . . . .